The three major tasks to help successfully carry out this project is illustrated in the figure bellow.


Task A: Device Characterization and Statistical Modeling
Central to this project is the modeling of the basic building blocks (i.e., devices) that compose the complex structures that implement security primitives PUFs, POKs, TRNGs, COAs, etc.While in most security analyses the composition as a whole may not be treated as a black box, one may assume that each device can be treated as a black box, i.e., only its input/output behavior described as a statistical process is known to an attacker. The goal of this task is to model a device as a parameterized statistical process that takes as input its internal state, environmental conditions (e.g., voltage/temperature variations), challenge bits, and other inputs, and produces an output with possible side information.

Task B: Property Identification and Composition Synthesis
In order to address security issues effectively at nano-scale and develop new devices that are better suited for security and resiliency against attacks we investigate to identify a set of universal security properties of devices that correspond to the hardness or infeasibility of attacking physical security primitives.

Task C: Evaluation and Re-design
With the data collected, and the models and compositions developed in Tasks A and B, in this task, (1) new nano-devices based on nano-CMOS, PCM, and 3D technology with security as the prime objective, and (2) new security primitives/enhancements shall be developed. Fabrication and simulation of these device concepts, security primitives, and compositions to validate the proposed metric using
experimental analysis is one of the plans on this task.